Chenming Calvin Hu
Electrical and Electronic Engineering · 2000–2020
A researcher in the Science corpus: 30 papers; trusts 2 researchers and is trusted by 8 researchers here, as inferred from the citation graph.
Subfields
- Electrical and Electronic Engineering — 87 citations into it; #4,415 of 16,539 by trust here, #1,993 by citations
Whom Chenming Calvin Hu trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts Chenming Calvin Hu overall
Papers from Chenming Calvin Hu's perspective
Ordered by how strongly the researchers Chenming Calvin Hu trusts endorse each paper. Same corpus, a different order for every researcher.
- Ferroelectric negative capacitance MOSFET: Capacitance tuning & antiferroelectric operation (International Electron Devices Meeting)
- Metal-Ferroelectric-Meta-Oxide-semiconductor field effect transistor with sub-60mV/decade subthreshold swing and internal voltage amplification (International Electron Devices Meeting)
- Enhancement of Ferroelectricity in Strained BaTiO3 Thin Films (Science)
- Experimental evidence of ferroelectric negative capacitance in nanoscale heterostructures
- Field-Effect Tunneling Transistor Based on Vertical Graphene Heterostructures (Science)
- Atomically thin MoS₂: a new direct-gap semiconductor. (Physical Review Letters)
- High-performance single layered WSe₂ p-FETs with chemically doped contacts. (Nano letters (Print))
- Degenerate n-doping of few-layer transition metal dichalcogenides by potassium. (Nano letters (Print))
- How good can monolayer MoS₂ transistors be? (Nano letters (Print))
- Vertical field-effect transistor based on graphene-WS2 heterostructures for flexible and transparent electronics. (Nature Nanotechnology)
Their papers
- Complementary silicide source/drain thin-body MOSFETs for the 20 nm gate length regime (2000) — 232 citations
- FinFET-a self-aligned double-gate MOSFET scalable to 20 nm (2000) — 1,667 citations
- Field-effect transistors built from all two-dimensional material components. (2014) — 636 citations
- Ferroelectric negative capacitance MOSFET: Capacitance tuning & antiferroelectric operation (2011) — 317 citations
- Sub-50 nm P-channel FinFET (2001) — 316 citations
- New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation (2000) — 501 citations
- Si tunnel transistors with a novel silicided source and 46mV/dec swing (2010) — 196 citations
- Gate length scaling and threshold voltage control of double-gate MOSFETs (2000) — 181 citations
- MoS2 transistors with 1-nanometer gate lengths (2016) — 1,329 citations
- Tunnel Field Effect Transistor With Raised Germanium Source (2010) — 166 citations
- Direct tunneling leakage current and scalability of alternative gate dielectrics (2002) — 200 citations
- SOI thermal impedance extraction methodology and its significance for circuit simulation (2001) — 159 citations
- Effect of Top Electrode Material on Resistive Switching Properties of $\hbox{ZrO}_{2}$ Film Memory Devices (2007) — 304 citations
- Nanoscale CMOS spacer FinFET for the terabit era (2002) — 141 citations
- Negative Capacitance in Short-Channel FinFETs Externally Connected to an Epitaxial Ferroelectric Capacitor (2016) — 202 citations
- Charge-trap memory device fabricated by oxidation of Si/sub 1-x/Ge/sub x/ (2001) — 221 citations
- 25 nm CMOS Omega FETs (2002) — 181 citations
- Sub-20 nm CMOS FinFET technologies (2001) — 225 citations
- A spacer patterning technology for nanoscale CMOS (2002) — 218 citations
- 5nm-gate nanowire FinFET (2004) — 235 citations