Nanoscale CMOS spacer FinFET for the terabit era

By Yang-Kyu Choi, Tsu-Jae King, Chenming Calvin Hu. 2002

141 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/e12c833417641cb26fe7187cc33f9619a97b54ce

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In Electrical and Electronic Engineering

1. Edward J. Nowak
2. Y. Zhang

Citations in the corpus

• Extension and source/drain design for high-performance FinFET devices (2003, methodology): “The fin can be formed using spacer image transfer (SIT) [ 7 ], [8], or by using trimming techniques such as resist ashing to define fins using optical lithography.”