Edward J. Nowak
Electrical and Electronic Engineering · 2001–2019
A researcher in the Science corpus: 7 papers; trusts 1 researcher and is trusted by 1 researcher here, as inferred from the citation graph.
Subfields
- Electrical and Electronic Engineering — 30 citations into it; #14,483 of 16,539 by trust here, #4,712 by citations
Whom Edward J. Nowak trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts Edward J. Nowak overall
Papers from Edward J. Nowak's perspective
Ordered by how strongly the researchers Edward J. Nowak trusts endorse each paper. Same corpus, a different order for every researcher.
- Six-band k⋅p calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thickness
- Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs (IEEE Electron Device Letters)
- On the performance limits for Si MOSFETs: a theoretical study
- Scaling challenges and device design requirements for high performance sub-50 nm gate length planar CMOS transistors (2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104))
- Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs (IEEE International Electron Devices Meeting 2003)
- On experimental determination of carrier velocity in deeply scaled NMOS: how close to the thermal limit? (IEEE Electron Device Letters)
- Limits to binary logic switch scaling - a gedanken model (Proceedings of the IEEE)
- New physics-based analytic approach to the thin-oxide breakdown statistics (IEEE Electron Device Letters)
- Experimental study on carrier transport mechanism in ultrathin-body SOI nand p-MOSFETs with SOI thickness less than 5 nm (Digest. International Electron Devices Meeting,)
- The effective drive current in CMOS inverters (Digest. International Electron Devices Meeting,)
Their papers
- Device scaling limits of Si MOSFETs and their application dependencies (2001) — 1,599 citations
- High-performance CMOS variability in the 65-nm regime and beyond (2006) — 707 citations
- Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation (2002) — 181 citations
- Extension and source/drain design for high-performance FinFET devices (2003) — 237 citations
- Silicon CMOS devices beyond scaling (2006) — 464 citations
- Challenges and Limitations of CMOS Scaling for FinFET and Beyond Architectures (2019) — 204 citations
- Experimental evidence of T/sub BD/ power-law for voltage dependence of oxide breakdown in ultrathin gate oxides (2002) — 133 citations