The effective drive current in CMOS inverters

By M. Na, Edward J. Nowak, Wilfried E. Haensch, J. Cai. Digest. International Electron Devices Meeting,, 2002

255 citations recorded by the source corpus.

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Challenges and Limitations of CMOS Scaling for FinFET and Beyond Architectures (2019, background): “It has been shown that the effective drive current (Ieff ) that well correlates to the intrinsic switching speed is given by equation (2) [42], [43]:”
DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling (2012, unknown): “15 fF/um Effective On Current / Width [24] 650 uA/um 738 uA/um Single-transistor Off Current 200 nA/um 100 nA/um Subthreshold Swing 100 mV/dec 80 mV/dec DIBL 150 mV/V 125 mV/V”
Silicon CMOS devices beyond scaling (2006, background): “It has been shown that a significantly more accurate predictor of CMOS inverter delay is given [23] by”
Effective Capacitance and Drive Current for Tunnel FET (TFET) CV/I Estimation (2009, methodology): “It was shown in [14] and [15] that an effective drive current (IEFF) needs to be used to predict the actual delay of a MOSFET inverter”