On the performance limits for Si MOSFETs: a theoretical study

By F. Assad, Zhibin Ren, D. Vasileska, Supriyo Datta, Mark S. Lundstrom. 2000

226 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/98d9997fda8ac348e57517b7786c8e6e8b70fc4f

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In Electrical and Electronic Engineering

Citations in the corpus

Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application (2001, background): “channel can remarkably exceed the bulk-silicon saturation value [17], [18], thus pushing the device toward its maximum current drivability which is eventually limited by the ballistic transport regime [19]–[22].”
Essential physics of carrier transport in nanoscale MOSFETs (2000, methodology): “The maximum value of < υ(0)> is approximately the uni-directional thermal velocity, υT, because the positive velocity carriers at the beginning of the channel were injected from the thermal equilibrium source [6, 7].”
High-κ dielectrics for advanced carbon-nanotube transistors and logic gates (2002, background): “Taking the effective width of our devices to be ∼2 d , we derive a transconductance of 3,000 S m −1 , which is still well above that achieved in the state-of-the-art Si MOSFETs (∼800 S m −1 for the Intel 60 nm transisto”
A compact scattering model for the nanoscale double-gate MOSFET (2002, background): “In the case of ballistic transport, the later part and the charge density in it can be expressed as [15]”
Theory of ballistic nanotransistors (2003, methodology): “The operation of MOSFETs in the ballistic regime has recently been explored by simple, analytical models [13]–[16] as well as by detailed numerical simulations [17]–[22].”
Nanoscale Transistors: Device Physics, Modeling and Simulation (2005, background): “2) The approach outlined here is essentially Natori’s theory of the ballistic MOSFET [10, 11] which has been further developed recently [12-14].”
On the mobility versus drain current relation for a nanoscale MOSFET (2001, background): “These expressions assume nondegenerate carrier statistics (see [10], [11] for a treatment of degenerate carrier statistics in the ballistic case).”
Generalized effective-mass approach for n-type metal-oxide-semiconductor field-effect transistors on arbitrarily oriented wafers (2004, methodology): “The BTE has also been used, along with related concepts such as density-of-states and conduction effective masses, in order to explore the upper limit of nanoscale MOSFET performance [14-16].”
Device scaling limits of Si MOSFETs and their application dependencies (2001, background): “is the thermal injection velocity at the source [41].”