Six-band k⋅p calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thickness

By Massimo V. Fischetti, Z. Ren, P. Solomon, Min Yang, K. Rim. 2003

480 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/566e414689c4cbd9bc8e2157b725fbe5628a97fb

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In Electrical and Electronic Engineering

Citations in the corpus

Physical limits of silicon transistors and circuits (2005, background): “The splitting is dependent on crystalline orientation and is different for different crystallographic orientations of the silicon surface (Fischetti et al 2003).”
Uniaxial-process-induced strained-Si: extending the CMOS roadmap (2006, methodology): “Biaxial stress suffers from defects and performance loss at high vertical electric fields [16].”
Modeling of Surface-Roughness Scattering in Ultrathin-Body SOI MOSFETs (2007, methodology): “Using this matrix element, we calculate the roughness-limited low-field electron mobility in the UTBSOI MOSFETs and study its dependence on the silicon body thickness, the effective field, and the dielectric constant of insulator.”
A 90-nm logic technology featuring strained-silicon (2004, background): “10) with increased vertical field [38].”
Review: Semiconductor Piezoresistance for Microsystems (2009, background): “However, recent computational advances have enabled an improved understanding of p-type piezoresistance [73], [91]–[93].”
A logic nanotechnology featuring strained-silicon (2004, background): “For both biaxial tensile and uniaxial compressive stress, a key component of the enhanced mobility results from the lowest energy subband having a low conductivity effective mass because it is “light hole like” [13]–[15].”
Strain: A Solution for Higher Carrier Mobility in Nanoscale MOSFETs (2009, background): “The dominant scattering mechanisms in strained Si devices are intervalley phonon scattering (53) and surface roughness scattering (54).”
Hybrid-orientation technology (HOT): opportunities and challenges (2006, background): “To obtain the maximum benefit of mobility improvement, all the gates of p-channel MOSFETs have to be lined up in one direction because hole mobility is strongly anisotropic on the (110) surface due to the strong anisotropic shape of the valence band [28].”
Silicon CMOS devices beyond scaling (2006, background): “For holes, a complicated deformation of the bands can occur [45].”