Yale N. Patt

Hardware and Architecture · 2003–2011

A researcher in the Science corpus: 8 papers; trusts 14 researchers and is trusted by 31 researchers here, as inferred from the citation graph.

Subfields

• Hardware and Architecture — 39 citations into it; #63 of 1,551 by trust here, #195 by citations
• Computer Networks and Communications — 37 citations into it; #898 of 9,886 by trust here, #1,275 by citations

Whom Yale N. Patt trusts overall

Their strongest outbound trust, strongest first, inferred from their citations.

1. Erez Perelman
2. Moinuddin K. Qureshi
3. Seongbeom Kim
4. Onur Mutlu
5. Greg Hamerly
6. Chi-Keung Luk
7. Daniel N. Lynch
8. Ravi Rajwar

Who trusts Yale N. Patt overall

1. Onur Mutlu
2. Yuejian Xie
3. Jichuan Chang
4. Gabriel H. Loh
5. Vivek Seshadri
6. Ripal Nathuji
7. Sergey Zhuravlev
8. Moinuddin K. Qureshi
9. Yoongu Kim
10. Jason Mars

Papers from Yale N. Patt's perspective

Ordered by how strongly the researchers Yale N. Patt trusts endorse each paper. Same corpus, a different order for every researcher.

1. Balancing thoughput and fairness in SMT processors (2001 IEEE International Symposium on Performance Analysis of Systems and Software. ISPASS.)
2. Fair cache sharing and partitioning in a chip multiprocessor architecture (Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 2004. PACT 2004.)
3. POWER4 system microarchitecture (IBM Journal of Research and Development)
4. Heterogeneous chip multiprocessors (Computer)
5. A Case for MLP-Aware Cache Replacement (International Symposium on Computer Architecture)
6. Speculative lock elision: enabling highly concurrent multithreaded execution (Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture. MICRO-34)
7. Runahead execution: an alternative to very large instruction windows for out-of-order processors (The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings.)
8. Amdahl's Law in the Multicore Era (Computer)
9. A first-order superscalar processor model (Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.)
10. Transactional lock-free execution of lock-based programs (ASPLOS X)

Their papers

• Runahead execution: an alternative to very large instruction windows for out-of-order processors (2003) — 482 citations
• Improving GPU performance via large warps and two-level warp scheduling (2011) — 443 citations
• Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems (2010) — 316 citations
• Accelerating critical section execution with asymmetric multi-core architectures (2009) — 320 citations
• Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers (2007) — 378 citations
• Adaptive insertion policies for high performance caching (2007) — 760 citations
• Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches (2006) — 1,094 citations
• A Case for MLP-Aware Cache Replacement (2006) — 337 citations