Heterogeneous chip multiprocessors
By Rakesh Kumar, Dean M. Tullsen, N. Jouppi, Parthasarathy Ranganathan. Computer, 2005
388 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/ca8572319cda59106a8f1e1d4db89f32bdf0e7d3
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Onur Mutlu
- Yale N. Patt
- Moinuddin K. Qureshi
- Sunpyo Hong
- Hyesoon Kim
- Chi-Keung Luk
- Mark D. Hill
- M. Aater Suleman
In Hardware and Architecture
- Onur Mutlu
- Yale N. Patt
- Moinuddin K. Qureshi
- Sunpyo Hong
- Hyesoon Kim
- Chi-Keung Luk
- Mark D. Hill
- M. Aater Suleman
Citations in the corpus
- Amdahl's Law in the Multicore Era (2008, background): “An alternative to a symmetric multicore chip is an asymmetric (or heterogeneous) multicore chip where one or more cores are more powerful than the others [3, 8, 9, 10, 14].”
- Accelerating critical section execution with asymmetric multi-core architectures (2009, background): “Critical sections are different from Amdahl s serial bottleneck: during the execution of a critical section, other threads that do not need to execute the same critical section can make progress.”
- Scaling the bandwidth wall: challenges in and avenues for CMP scaling (2009, methodology): “We use chip size estimates from prior work [15, 16] which shows that simpler smaller cores can be up to 80× smaller.”
- Qilin: Exploiting parallelism on heterogeneous multiprocessors with adaptive mapping (2009, background): “By providing processing elements (PEs)1 of different performance/energy characteristics on the same machine, these architectures could deliver high performance and energy efficiency [14].”