Fair cache sharing and partitioning in a chip multiprocessor architecture

By Seongbeom Kim, Dhruba Chandra, Yan Solihin. Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 2004. PACT 2004., 2004

584 citations recorded by the source corpus.

View Paper: https://www.semanticscholar.org/paper/23c4c1f73866aab23a4757a9702b567064f54357

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Citations in the corpus

A NUCA Substrate for Flexible CMP Cache Sharing (2007, background): “investigated fairness issues in CMP cache sharing [17].”
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems (2010, unknown): “Prior work in providing fairness in different shared resources of CMP systems focused on fair caching [12, 13, 15, 25], fair memory scheduling [22–24], and fair on-chip interconnects [4, 9, 17].”
Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems (2008, background): “, [38, 14]) and multithreaded process or resources (e.”
Fair Queuing Memory Systems (2006, background): “On a four processor CMP running workloads containing a mix of applications with a range of memory bandwidth demands, the proposed memory scheduler provides QoS to all of the threads in all of the workloads, improves system performance by an average of 14% (41% in the best case), and reduces the…”
PIPP: promotion/insertion pseudo-partitioning of multi-core shared caches (2009, background): “The amount of space allocated or per-core priority levels can be determined at the software level, for example by the operating system [8, 12, 17, 18, 37, 40], or it could be dynamically determined based on run-time observations of program requirements [7, 23, 36, 38].”
Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors (2007, unknown): “[29, 11]) proposed techniques for fair cache partitioning.”
The evicted-address filter: A unified mechanism to address both cache pollution and thrashing (2012, methodology): “Cache partitioning is one technique that has been eUectively used to improve shared-cache performance [37, 51, 52, 56] or provide QoS in multi-core systems with shared caches [7, 15, 24, 31].”
Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches (2006, methodology): “The proposed framework can also be used to implement execution-time fairness [7] without requiring any profile information.”
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems (2008, methodology): “|X i − X j | as FM0.”
Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems (2007, methodology): “[19] develop hardware techniques to provide thread-fairness in shared caches.”
Predicting inter-thread cache contention on a chip multi-processor architecture (2005, background): “[11] have proposed partitioning the shared cache in a CMP system to minimize the number of cache misses or maximizing fairness.”
Cooperative Caching for Chip Multiprocessors (2006, methodology): “Besides the many CMP caching studies [18, 20, 26, 31], several hybrid caching schemes [6, 8, 13, 15, 34, 35] are closely related to our proposal of optimizing both CMP cache capacity and access latency.”