Transactional lock-free execution of lock-based programs
By Ravi Rajwar, James R. Goodman. ASPLOS X, 2002
367 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/e0ec0786c3cdf0788125942a5c531b8326b927e5
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Håkan Grahn
- T. Harris
- Onur Mutlu
- Keir Fraser
- J. Larus
- Maurice Herlihy
- Ravi Rajwar
- Moinuddin K. Qureshi
In Hardware and Architecture
- Håkan Grahn
- Onur Mutlu
- T. Harris
- Keir Fraser
- J. Larus
- Maurice Herlihy
- Ravi Rajwar
- Moinuddin K. Qureshi
Citations in the corpus
- Transactional memory (2010, methodology): “For example, they have implemented Transactional Lock Eli-sion, which is similar to Speculative Lock Elision [58], HyTM [80], SpHT [81], and PhTM [82].”
- Transactional memory coherence and consistency (2004, background): “For example, Martinez and Torrellas [25], Rajwar and Goodman [30, 31], and Rundberg and Stenstrom [32] have independently proposed how to speculate through locks and past barriers in recent papers.”
- Accelerating critical section execution with asymmetric multi-core architectures (2009, methodology): “ACS outperforms TLR on all benchmarks, and by 18% on average because ACS accelerates many critical sections, whether or not they have data con.icts, thereby reducing serialization.”
- Transactional Memory, 2nd edition (2010, methodology): “Transactional Lock Removal [249] extended SLE to use timestamp-based fair conflict resolution to provide transactional semantics and starvation freedom, using Lamport’s logical clock construction [186] and Rosenkrantz et al.”
- Virtualizing transactional memory (2005, positive): “This mode is based on mechanisms proposed by prior work [2, 7, 10, 20], and this mode's performance effectively determines the performance of the overall scheme.”
- The Landscape of Parallel Computing Research: A View from Berkeley (2006, methodology): “The transactional model enables non-blocking mutual exclusion synchronization (no stalls on mutex locks or barriers) [Rajwar and Goodman 2002].”
- Concurrent programming without locks (2007, methodology): “Recently, researchers have returned to the question of building various forms of hardware transactional memory (HTM) [Rajwar and Goodman 2002; Hammond et al. 2004; Ananian et al. 2005; Moore et al. 2005; McDonald et al. 2005; Rajwar et al. 2005].”