Li-Shiuan Peh

Computer Networks and Communications · 2001–2012

A researcher in the Science corpus: 11 papers; trusts 12 researchers and is trusted by 41 researchers here, as inferred from the citation graph.

Subfields

• Computer Networks and Communications — 63 citations into it; #759 of 9,886 by trust here, #540 by citations
• Electrical and Electronic Engineering — 52 citations into it; #3,076 of 16,539 by trust here, #8,176 by citations
• Hardware and Architecture — 42 citations into it; #420 of 1,551 by trust here, #275 by citations
• Electronic, Optical and Magnetic Materials — 6 citations into it; #751 of 2,886 by trust here, #2,156 by citations
• Artificial Intelligence — 5 citations into it

Whom Li-Shiuan Peh trusts overall

Their strongest outbound trust, strongest first, inferred from their citations.

1. William (Bill) J. Dally
2. Chih-Jen Lin
3. Hangsheng Wang
4. Jingcao Hu
5. Brian Towles
6. Giovanni De Micheli
7. Radu Marculescu
8. Luca Benini
9. Chrysostomos Nicopoulos
10. Srinivasan Murali

Who trusts Li-Shiuan Peh overall

1. Thomas Moscibroda
2. Naveen Muralimanohar
3. Chen Sun
4. Feihui Li
5. Hangsheng Wang
6. Onur Mutlu
7. Niket Agarwal
8. Rajeev Balasubramonian
9. Chrysostomos Nicopoulos
10. Radu Marculescu

Papers from Li-Shiuan Peh's perspective

Ordered by how strongly the researchers Li-Shiuan Peh trusts endorse each paper. Same corpus, a different order for every researcher.

1. Route packets, not wires: on-chip interconnection networks (Proceedings - Design Automation Conference)
2. Networks on Chips: A New SoC Paradigm (Computer)
3. The future of wires (Proceedings of the IEEE)
4. Analysis of power consumption on switch fabrics in network routers (Proceedings - Design Automation Conference)
5. Orion: a power-performance simulator for interconnection networks (35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings.)
6. Dynamic voltage scaling with links for power optimization of interconnection networks (The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings.)
7. Addressing the system-on-a-chip interconnect woes through communication-based design (Proceedings - Design Automation Conference)
8. ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers (Micro)
9. Theory of latency-insensitive design (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.)
10. Bandwidth-constrained mapping of cores onto NoC architectures (Proceedings Design, Automation and Test in Europe Conference and Exhibition)

Their papers

• A delay model and speculative architecture for pipelined routers (2001) — 578 citations
• Dynamic voltage scaling with links for power optimization of interconnection networks (2003) — 492 citations
• DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling (2012) — 573 citations
• Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives (2009) — 750 citations
• SignalGuru: leveraging mobile phones for collaborative traffic signal schedule advisory (2011) — 401 citations
• GARNET: A detailed on-chip network model inside a full-system simulator (2009) — 785 citations
• ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration (2009) — 863 citations
• Express virtual channels: towards the ideal interconnection fabric (2007) — 400 citations
• Research Challenges for On-Chip Interconnection Networks (2007) — 504 citations
• Orion: a power-performance simulator for interconnection networks (2002) — 844 citations
• Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet (2002) — 2,305 citations