Bandwidth-constrained mapping of cores onto NoC architectures

By Srinivasan Murali, Giovanni De Micheli. Proceedings Design, Automation and Test in Europe Conference and Exhibition, 2004

756 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/a4722ef1a533dc463abc303b0069478119e28198

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Computer Networks and Communications

1. Ümit Y. Ogras
2. Radu Marculescu
3. Srinivasan Murali
4. Giovanni De Micheli
5. Jingcao Hu
6. Li-Shiuan Peh
7. Yatin Vasant Hoskote
8. Natalie D. Enright Jerger

In Hardware and Architecture

1. Ümit Y. Ogras
2. Radu Marculescu
3. Srinivasan Murali
4. Jingcao Hu
5. Li-Shiuan Peh
6. Giovanni De Micheli
7. Yatin Vasant Hoskote
8. Natalie D. Enright Jerger

Citations in the corpus

• Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives (2009, methodology): “Murali and De Micheli in [115] propose a mapping algorithm for NoC architectures which supports traffic splitting.”
• Key research problems in NoC design: a holistic perspective (2005, methodology): “These techniques use the average packet hop value as a cost function by relating it to the communication energy consumption [6] or communication cost [7].”
• "It's a small world after all": NoC performance optimization via long-range link insertion (2006, methodology): “More precisely, the studies in [2], [19], and [27] consider regular network topologies and present algorithms for application mapping under different routing strategies.”
• NoC synthesis flow for customized domain specific multiprocessor systems-on-chip (2005, methodology): “The problem of mapping cores onto NoC architectures is addressed in [22], [23], [26], [27].”