Alper Buyuktosunoglu
Hardware and Architecture · 2000–2006
A researcher in the Science corpus: 5 papers; trusts 2 researchers and is trusted by 4 researchers here, as inferred from the citation graph.
Subfields
- Hardware and Architecture — 18 citations into it; #746 of 1,551 by trust here, #447 by citations
Whom Alper Buyuktosunoglu trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts Alper Buyuktosunoglu overall
Papers from Alper Buyuktosunoglu's perspective
Ordered by how strongly the researchers Alper Buyuktosunoglu trusts endorse each paper. Same corpus, a different order for every researcher.
- Reducing power density through activity migration (Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.)
- Automatically characterizing large scale program behavior (ASPLOS X)
- POWER4 system microarchitecture (IBM Journal of Research and Development)
- Reconfigurable caches and their application to media processing (Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201))
- Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling (Proceedings Eighth International Symposium on High Performance Computer Architecture)
- Clock rate versus IPC: the end of the road for conventional microarchitectures (Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201))
- Techniques for Multicore Thermal Management: Classification and New Exploration (International Symposium on Computer Architecture)
- Gated-Vdd: a circuit technique to reduce leakage in deep-submicron cache memories (International Symposium on Low Power Electronics and Design)
- Single-ISA heterogeneous multi-core architectures: the potential for processor power reduction (Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.)
- IBM Power5 chip: a dual-core multithreaded processor (IEEE Micro)
Their papers
- Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors (2000) — 526 citations
- An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget (2006) — 671 citations
- Microarchitectural techniques for power gating of execution units (2004) — 439 citations
- An Adaptive Issue Queue for Reduced Power at High Performance (2000) — 116 citations
- Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures (2000) — 397 citations