Radu Teodorescu
Electrical and Electronic Engineering · 2008
A researcher in the Science corpus: 2 papers; trusts 4 researchers and is trusted by 0 researchers here, as inferred from the citation graph.
Subfields
- Electrical and Electronic Engineering — 17 citations into it
- Hardware and Architecture — 12 citations into it
Whom Radu Teodorescu trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
- Kevin Skadron
- Canturk Isci
- Smruti Ranjan Sarangi
- Mircea R. Stan
- Saibal Mukhopadhyay
- Karthik Sankaranarayanan
- Alper Buyuktosunoglu
- Keith I. Farkas
- John G. Proakis
- Sebastian Herbert
Papers from Radu Teodorescu's perspective
Ordered by how strongly the researchers Radu Teodorescu trusts endorse each paper. Same corpus, a different order for every researcher.
- Reducing power density through activity migration (Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.)
- Temperature-aware microarchitecture (30th Annual International Symposium on Computer Architecture, 2003. Proceedings.)
- HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects
- Parameter variations and impact on circuits and microarchitecture (Proceedings - Design Automation Conference)
- A self-tuning DVS processor using delay-error detection and correction (IEEE Journal of Solid-State Circuits)
- Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration (IEEE J. Solid State Circuits)
- Single-ISA heterogeneous multi-core architectures: the potential for processor power reduction (Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.)
- Power and temperature control on a 90-nm Itanium family processor (IEEE Journal of Solid-State Circuits)
- New generation of predictive technology model for sub-45nm design exploration (IEEE International Symposium on Quality Electronic Design)
- A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor (Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.)
Their papers
- Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors (2008) — 347 citations
- VARIUS: A Model of Process Variation and Resulting Timing Errors for Microarchitects (2008) — 433 citations