Ümit Y. Ogras

Computer Networks and Communications · 2005–2009

A researcher in the Science corpus: 4 papers; trusts 16 researchers and is trusted by 5 researchers here, as inferred from the citation graph.

Subfields

• Computer Networks and Communications — 55 citations into it; #4,633 of 9,886 by trust here, #5,733 by citations
• Hardware and Architecture — 45 citations into it; #1,259 of 1,551 by trust here, #1,153 by citations
• Electrical and Electronic Engineering — 34 citations into it; #7,363 of 16,539 by trust here, #11,977 by citations
• Electronic, Optical and Magnetic Materials — 6 citations into it; #980 of 2,886 by trust here, #2,744 by citations

Whom Ümit Y. Ogras trusts overall

Their strongest outbound trust, strongest first, inferred from their citations.

1. Srinivasan Murali
2. Jingcao Hu
3. Giovanni De Micheli
4. William (Bill) J. Dally
5. Radu Marculescu
6. K. Srinivasan
7. Brian Towles
8. Hangsheng Wang
9. Luca Benini
10. Kees G. W. Goossens

Who trusts Ümit Y. Ogras overall

1. Amlan Ganguly
2. Sujay Deb
3. Partha Pratim Pande
4. Radu Marculescu
5. Kevin Chang
6. Benjamin J. Belzer
7. Brett Stanley Feero

Papers from Ümit Y. Ogras's perspective

Ordered by how strongly the researchers Ümit Y. Ogras trusts endorse each paper. Same corpus, a different order for every researcher.

1. Networks on Chips: A New SoC Paradigm (Computer)
2. Route packets, not wires: on-chip interconnection networks (Proceedings - Design Automation Conference)
3. Addressing the system-on-a-chip interconnect woes through communication-based design (Proceedings - Design Automation Conference)
4. Orion: a power-performance simulator for interconnection networks (35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings.)
5. Energy-aware mapping for tile-based NoC architectures under performance constraints (Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.)
6. Theory of latency-insensitive design (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.)
7. Bandwidth-constrained mapping of cores onto NoC architectures (Proceedings Design, Automation and Test in Europe Conference and Exhibition)
8. A network on chip architecture and design methodology (Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002)
9. SUNMAP: a tool for automatic topology selection and generation for NoCs (Proceedings - Design Automation Conference)
10. The future of wires (Proceedings of the IEEE)

Their papers

• "It's a small world after all": NoC performance optimization via long-range link insertion (2006) — 433 citations
• Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives (2009) — 750 citations
• On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches (2007) — 300 citations
• Key research problems in NoC design: a holistic perspective (2005) — 374 citations