Partha Pratim Pande

Electrical and Electronic Engineering · 2005–2012

A researcher in the Science corpus: 4 papers; trusts 11 researchers and is trusted by 0 researchers here, as inferred from the citation graph.

Subfields

• Electrical and Electronic Engineering — 28 citations into it
• Computer Networks and Communications — 21 citations into it
• Hardware and Architecture — 13 citations into it
• Materials Chemistry — 7 citations into it
• Electronic, Optical and Magnetic Materials — 6 citations into it

Whom Partha Pratim Pande trusts overall

Their strongest outbound trust, strongest first, inferred from their citations.

1. William (Bill) J. Dally
2. Kihong Park
3. Luca Benini
4. Ümit Y. Ogras
5. Brian Towles
6. Vasilis F. Pavlidis
7. Shashi Kumar
8. Hyung Gyu Lee
9. Walter Willinger
10. Feihui Li

Who trusts Partha Pratim Pande overall

1. Brett Stanley Feero
2. Amlan Ganguly

Papers from Partha Pratim Pande's perspective

Ordered by how strongly the researchers Partha Pratim Pande trusts endorse each paper. Same corpus, a different order for every researcher.

1. Networks on Chips: A New SoC Paradigm (Computer)
2. Route packets, not wires: on-chip interconnection networks (Proceedings - Design Automation Conference)
3. The future of wires (Proceedings of the IEEE)
4. A network on chip architecture and design methodology (Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002)
5. A generic architecture for on-chip packet-switched interconnections (Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537))
6. Performance evaluation and design trade-offs for network-on-chip interconnect architectures (IEEE transactions on computers)
7. Flattened Butterfly Topology for On-Chip Networks (Micro)
8. Interconnection Networks: An Engineering Approach
9. Demystifying 3D ICs: the pros and cons of going vertical (IEEE Design & Test of Computers)
10. Small worlds: the dynamics of networks between order and randomness

Their papers

• Performance evaluation and design trade-offs for network-on-chip interconnect architectures (2005) — 938 citations
• Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation (2009) — 512 citations
• Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges (2012) — 301 citations
• Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems (2011) — 313 citations