On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches

By Hyung Gyu Lee, N. Chang, Ümit Y. Ogras, Radu Marculescu. TODE, 2007

300 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/42ea970bacc0b506e353ffbb7e069fdb9c49cc41

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Computer Networks and Communications

1. Ümit Y. Ogras
2. Partha Pratim Pande
3. Li-Shiuan Peh
4. Brett Stanley Feero
5. Radu Marculescu
6. Yatin Vasant Hoskote
7. Natalie D. Enright Jerger
8. Srinivasan Murali

In Hardware and Architecture

1. Ümit Y. Ogras
2. Partha Pratim Pande
3. Brett Stanley Feero
4. Radu Marculescu
5. Li-Shiuan Peh
6. Natalie D. Enright Jerger
7. Yatin Vasant Hoskote

Citations in the corpus

• Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation (2009, methodology): “The Network-on-Chip (NoC) model is emerging as a revolutionary methodology in solving the performance limitations arising out of long interconnects, outperforming more mainstream bus architectures [5], [6].”
• Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives (2009, background): “Toward this end, the authors in [91] compare”