Double-Gate Strained-Ge Heterostructure Tunneling FET (TFET) With record high drive currents and ≪60mV/dec subthreshold slope
By T. Krishnamohan, Donghyun Kim, S. Raghunathan, Krishna C. Saraswat. 2008 IEEE International Electron Devices Meeting, 2008
557 citations recorded by the source corpus.
Subfields: Biomedical Engineering, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/619df3120f244db5c6cb840f79a6d33e5fd17d80
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In Biomedical Engineering
- Mridula Gupta
- Manoj Saxena
- Rakhi Narang
- Kaustav Banerjee
- Wilfried E. Haensch
- Steven J. Koester
- Mamidala Jagadesh Kumar
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In Electrical and Electronic Engineering
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- Jason C. S. Woo
Citations in the corpus
- Vertical Si-Nanowire $n$-Type Tunneling FETs With Low Subthreshold Swing ($\leq \hbox{50}\ \hbox{mV/decade}$ ) at Room Temperature (2011, background): “It should be noted that ambipolar conduction, which is an issue in TFET devices [3], [9], is not observed in our results.”
- Improved Subthreshold and Output Characteristics of Source-Pocket Si Tunnel FET by the Application of Laser Annealing (2013, background): “Small band-gap materials, such as SiGe and Ge, were also proposed to improve carrier tunneling by lowering the tunnel barriers [9]–[11].”
- Tunnel Field-Effect Transistors: State-of-the-Art (2014, background): “The majority of these devices are group IV materials, such as Si [26]–[31], Si/Ge [32], strained SiGe [37], and strained Ge [35].”
- Effect of Pocket Doping and Annealing Schemes on the Source-Pocket Tunnel Field-Effect Transistor (2011, background): “[11] N. V. Girish, R. Jhaveri, and J. C. S. Woo, “Asymmetric tunneling MOSFETs: A novel device solution for sub-100 nm CMOS technology,” Int.”
- Low-Voltage Tunnel Transistors for Beyond CMOS Logic (2010, unknown): “At this writing, less than 60-mV/decade subthreshold swings have been reported in only a few TFETs based on carbon nanotubes (CNT) [6], [35], Si [36]–[39], Ge [ 40 ], and p þ Ge=n þ Si [41] channels.”
- Novel Attributes of a Dual Material Gate Nanoscale Tunnel Field-Effect Transistor (2011, methodology): “One of the most effective techniques in improving the ION is to choose a lower band-gap material for the channel [10]–[14], [20].”
- Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Heterodielectric BOX (2015, background): “But the unique property of ambipolar conduction in TFETs limits their utility for digital circuit applications [13], [14].”
- On the Possibility of Obtaining MOSFET-Like Performance and Sub-60-mV/dec Swing in 1-D Broken-Gap Tunnel Transistors (2010, background): “Furthermore, TFET subthreshold characteristics with S < 60 mV/dec are obtained only at very small current levels, in a limited bias range [13].”
- Dielectric Modulated Tunnel Field-Effect Transistor—A Biomolecule Sensor (2012, background): “Since DMFET, p-i-n, and p-n-p-n TFET structures have already been fabricated [2], [5], [6], it seems feasible to realize a nanogap cavity DM-TFET.”
- Effect of Drain Doping Profile on Double-Gate Tunnel Field-Effect Transistor and its Influence on Device RF Performance (2014, background): “rent has been reported to dramatically improve with the use of double-gate architecture [23], [24], a high-k gate dielectric [24], and a low-k spacer [14].”
- Controlling Ambipolar Current in Tunneling FETs Using Overlapping Gate-on-Drain (2014, methodology): “underlapped, lower drain doping and high bandgap drain) reported earlier [2], [8]–[11], the gate is present only over the intrinsic channel region.”