HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects
By Yan Zhang, Dharmesh Parikh, Karthik Sankaranarayanan, Kevin Skadron, Mircea R. Stan. 2003
311 citations recorded by the source corpus.
View Paper: https://www.semanticscholar.org/paper/c2e222747c3ce97cc1e688741687b902994b71c8
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
- Radu Teodorescu
- Wei Huang
- Kevin Skadron
- Mircea R. Stan
- Josep Torrellas
- Karthik Sankaranarayanan
- Sunpyo Hong
- Sivakumar Velusamy
Citations in the corpus
- Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors (2008, methodology): “In addition, we use HotLeakage [39] to estimate leakage power at the same reference technology.”
- An integrated GPU power and performance model (2010, methodology): “[24] improved this static power mode l to consider temperature effects and operating voltages in HotLeakage, a software tool.”
- Leakage aware dynamic voltage scaling for real-time embedded systems (2004, background): “Furthermore, leakage has an adverse effect with the increase in temperature [29].”
- Temperature-aware microarchitecture (2003, methodology): “Eventually, we plan to combine HotSpot with our temperature/voltage-aware leakage model [30] to more precisely track dynamic leakage-temperature interactions, which we believe are an interesting area for future work.”
- VARIUS: A Model of Process Variation and Resulting Timing Errors for Microarchitects (2008, methodology): “The following subthreshold leakage model is based on that of HotLeakage [36], itself a simplification of the full BSIM3 SPICE model:”