Ru Huang
Electrical and Electronic Engineering · Nature Electronics · 2012–2020
A researcher in the Science corpus: 3 papers; trusts 3 researchers and is trusted by 2 researchers here, as inferred from the citation graph.
Subfields
- Electrical and Electronic Engineering — 25 citations into it; #13,016 of 16,539 by trust here, #13,553 by citations
- Materials Chemistry — 14 citations into it
- Atomic and Molecular Physics, and Optics — 8 citations into it
- Biomedical Engineering — 6 citations into it
Whom Ru Huang trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts Ru Huang overall
Papers from Ru Huang's perspective
Ordered by how strongly the researchers Ru Huang trusts endorse each paper. Same corpus, a different order for every researcher.
- Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec (IEEE Electron Device Letters)
- Tunnel field-effect transistors as energy-efficient electronic switches (Nature)
- Effect of Pocket Doping and Annealing Schemes on the Source-Pocket Tunnel Field-Effect Transistor (IEEE Transactions on Electron Devices)
- Fabrication, characterization, and physics of III–V heterojunction tunneling Field Effect Transistors (H-TFET) for steep sub-threshold swing (International Electron Devices Meeting)
- On the Correct Extraction of Interface Trap Density of MOS Devices With High-Mobility Semiconductor Substrates (IEEE Transactions on Electron Devices)
- Fundamentals of III-V Semiconductor MOSFETs
- Simulation of nanowire tunneling transistors: From the Wentzel–Kramers–Brillouin approximation to full-band phonon-assisted tunneling
- Model of interface states at III-V oxide interfaces
- Tunnel field effect transistor with increased ON current, low-k spacer and high-k dielectric
- Low-subthreshold-swing tunnel transistors (IEEE Electron Device Letters)
Their papers
- A Comparative Study on the Impacts of Interface Traps on Tunneling FET and MOSFET (2014) — 135 citations
- A novel Si tunnel FET with 36mV/dec subthreshold slope based on junction depleted-modulation through striped gate configuration (2012) — 133 citations
- A native oxide high-κ gate dielectric for two-dimensional electronics (2020) — 263 citations