Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec

By Woo Young Choi, Byung-Gook Park, J. Lee, Tsu-Jae King Liu. IEEE Electron Device Letters, 2007

1,727 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/63ac9614f437a57f6cd159bfdc97394f59941a46

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Citations in the corpus

Negative Capacitance Field Effect Transistor With Hysteresis-Free Sub-60-mV/Decade Switching (2016, background): “Accordingly, many device solutions for low-power CMOS devices have been extensively explored [1], [2], whereupon the concept of negative capacitance was suggested as an alternative for achieving SS < 60 mV/decade [3], [4]; thereafter, many studies followed [1]–[21].”
Study of Random Dopant Fluctuation Effects in Germanium-Source Tunnel FETs (2011, background): “Since a TFET switches on/off via alignment/misalignment of energy bands, its minimum SS can be less than 60 mV/dec [5], [6].”
Performance Enhancement of Novel InAs/Si Hetero Double-Gate Tunnel FET Using Gaussian Doping (2016, background): “Tunnel FETs (TFETs) are being extensively studied as a replacement for MOSFETs due to its desirable properties, such as suppressed SCEs and low subthreshold slope (SS) [5].”
A Compact 2-D Analytical Model for Electrical Characteristics of Double-Gate Tunnel Field-Effect Transistors With a SiO2/High- $k$ Stacked Gate-Oxide Structure (2016, background): “THE TUNNEL FET (TFET), also known as the green transistor [1], has drawn considerable attention of the researchers in recent times due to its capability of providing a very low subthreshold swing (SS) much below the Boltzmann limit of 60 mV/decade, the minimum achievable limit of the SS in the conve”
Low-Voltage Tunnel Transistors for Beyond CMOS Logic (2010, neutral): “[6], [35], [36], [40], [41], [43] transistors.”
A Dielectric-Modulated Tunnel-FET-Based Biosensor for Label-Free Detection: Analytical Modeling Study and Sensitivity Analysis (2012, background): “With the current research being focused upon exploring novel device architectures [5] to overcome the challenges that conventional CMOS technology is facing in terms of power supply scaling and severe shortchannel effects.”
Performance Comparison Between p-i-n Tunneling Transistors and Conventional MOSFETs (2008, neutral): “[5]–[9], [12], [13], [15]–[21], [23], [24], [27].”
Impact of a Spacer Dielectric and a Gate Overlap/Underlap on the Device Performance of a Tunnel Field-Effect Transistor (2011, background): “Both the theoretical and experimental results show that S can be much lower than 60 mV/dec for a TFET [6]–[8].”
Demonstration of L-Shaped Tunnel Field-Effect Transistors (2016, background): “Theoretically, TFETs can achieve sub-60-mV/decade subthreshold swing (S) at room temperature and maintain a high ON–OFF current ratio as the operating voltage is scaled down [1]–[7].”
N+ Pocket Doped Vertical TFET Based Dielectric-Modulated Biosensor Considering Non-Ideal Hybridization Issue: A Simulation Study (2020, background): “room temperature and other short channel effects (SCEs) which restrict the supply voltage scaling and degrades the device performance [11].”