Fabrication, characterization, and physics of III–V heterojunction tunneling Field Effect Transistors (H-TFET) for steep sub-threshold swing

By G. Dewey, B. Chu-Kung, J. Boardman, J. Fastenau, J. Kavalieros, Roza Kotlyar, W. K. Liu, D. Lubyshev, M. Metz, N. Mukherjee and 5 more. International Electron Devices Meeting, 2011

342 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/64d4a33689ea00ffb004e2518c01d21ff413448b

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In Biomedical Engineering

In Electrical and Electronic Engineering

Citations in the corpus

InAs–Si Nanowire Heterojunction Tunnel FETs (2012, background): “A number of all III–V TFETs based on lattice-matched mesa structures were demonstrated [4]–[6],”
High-Current GaSb/InAs(Sb) Nanowire Tunnel Field-Effect Transistors (2013, background): “Recent reports on devices with SS below 60 mV/decade [3]–[5], however, have shown that the devices suffer from low ON-current levels.”
A Comparative Study on the Impacts of Interface Traps on Tunneling FET and MOSFET (2014, background): “Experimental demonstrations with SS < 60 mV/decade also exhibit potential applications of TFET [4]–[6].”
Tunnel Field-Effect Transistors: Prospects and Challenges (2015, background): “few demonstrations [4]–[6] of steep SS III-V TFETs exist due to the immaturity of bulk semiconductor and gate-oxide”
Tunnel Field-Effect Transistors: State-of-the-Art (2014, background): “are given for Si in [26], [29], [31] and for InGaAs in [47].”
Dual-gated MoS2/WSe2 van der Waals tunnel diodes and transistors. (2015, background): “To date, significant progress has beenmade in exploring a wide range of TFET device architectures using carbon nanotubes(2) and Si,(3) Si Ge,(4) and III V semiconductors.(5) 7 Both homojunction and heterojunction device configurations have been explored, with the heterojunction devices exhibiting hi”
Inverters With Strained Si Nanowire Complementary Tunnel Field-Effect Transistors (2013, background): “A comparison with the InGaAs homojunction TFETs reported by Intel [3] reveals similar SS and IDS at very low VDS = 0.”
Demonstration of L-Shaped Tunnel Field-Effect Transistors (2016, background): “Using a smaller Eg material for the source and a lower Wfn metal for the gate can provide lower Vturn-ON [2]–[4].”