On the Correct Extraction of Interface Trap Density of MOS Devices With High-Mobility Semiconductor Substrates
By K. Martens, C. O. Chui, G. Brammertz, B. D. Jaeger, Duygu Kuzum, M. Meuris, M. Heyns, T. Krishnamohan, Krishna C. Saraswat, H. Maes and 1 more. IEEE Transactions on Electron Devices, 2008
371 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/24972c8f5182c5ae125e28f2d12dc893cc515871
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In Electrical and Electronic Engineering
Citations in the corpus
- A Comparative Study on the Impacts of Interface Traps on Tunneling FET and MOSFET (2014, methodology): “Generally, to study the effects of the trap energy and trap distribution on devices two typical high and low Gaussian distributions [26], [27] of interface traps density are incorporated into the interface, respectively, as shown in Fig.”