Low-subthreshold-swing tunnel transistors

By Qin Zhang, Wei Zhao, Alan C. Seabaugh. IEEE Electron Device Letters, 2006

610 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/7c489688abcb905f2fa67f6299cddfcbc225fb10

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In Electrical and Electronic Engineering

Citations in the corpus

Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec (2007, methodology): “Zhang et al. [9] provided a theoretical analysis that the SS value of TFETs can be reduced below 60 mV/dec. Bhuwalka et al. [10] showed a vertical Si/SiGe TFET with an SS of 44 mV/dec through device simulation.”
The Tunnel Source (PNPN) n-MOSFET: A Novel High Performance Transistor (2008, background): “Recently, a number of device ideas based on the principle of band-to-band tunneling have been investigated and reported ([9]–[15]).”
A Tunnel FET for $V_{DD}$ Scaling Below 0.6 V With a CMOS-Comparable Performance (2011, methodology): “This increase in the ON-current and the steep subthreshold swing compensates for the increase in parasitic capacitance due to the high-k spacer.”
Effect of Pocket Doping and Annealing Schemes on the Source-Pocket Tunnel Field-Effect Transistor (2011, background): “TFETs have been theoretically shown to exhibit a steep SS below the thermal limit of 60 mV/dec while maintaining a reasonable ION depending on the system of materials chosen [5], [7], [8], [10]–[14].”
Tunnel field-effect transistors as energy-efficient electronic switches (2011, background): “However, the channel valence band can be lifted by a small change in gate voltage, and the tunnelling width can effectively be reduced by the gate voltag”
Performance Comparison Between p-i-n Tunneling Transistors and Conventional MOSFETs (2008, methodology): “It has been predicted through detailed device simulations that BTBT FETs could produce subthreshold swings below the thermal limit in conventional semiconductor materials such as silicon [13-16], as well as in carbon nanotube (CNT) based transistors [17-21].”
Steep Subthreshold Slope n- and p-Type Tunnel-FET Devices for Low-Power and Energy-Efficient Digital Circuits (2009, background): “Although different T-FET structures have been reported in the literature [9], [10], [19], and a vertical n-type”
Novel Attributes of a Dual Material Gate Nanoscale Tunnel Field-Effect Transistor (2011, background): “and hence are being actively investigated for future low-power complementary metal–oxide–semiconductor (CMOS) applications [1]–[20].”
Study of Random Dopant Fluctuation Effects in Germanium-Source Tunnel FETs (2011, background): “Since a TFET switches on/off via alignment/misalignment of energy bands, its minimum SS can be less than 60 mV/dec [5], [6].”
Electronics based on two-dimensional materials. (2014, background): “Nowadays, graphene single crystals can be reproducibly grown up to about 1 cm2 in diameter on a Cu substrate, and recently single-crystal graphene up to 5 cm in diameter was grown on germanium (110)192, but there are still many challenges ahead in creating very ‘flat’ (<0.”