NBTI degradation: From physical mechanisms to modelling

By V. Huard, M. Denais, C. Parthasarathy. Microelectronics and reliability, 2006

517 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/ba0b547105f71c0980b3ead108f0e41f58158c1b

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In Electrical and Electronic Engineering

Citations in the corpus

The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction–Diffusion to Switching Oxide Traps (2011, background): “[13], who suggested that negative BTI (NBTI)”
Ubiquitous relaxation in BTI stressing—New evaluation and insights (2008, background): “, the recoverable component R, is then typically ascribed to interface state hydrogen repassivation [20] or to neutralization of trapped charge [30], while the permanent damage has been related to unpassivated interface states [30] and to deep hole traps [31,32].”
A two-stage model for negative bias temperature instability (2009, background): “where P is a roughly permanent contribution depending on the stress time only and is possibly due to interface states [17].”
A comprehensive model for PMOS NBTI degradation: Recent progress (2007, background): “Since all these features have significant implications for lifetime projection, they mandate a reconsideration of the R–D model [5,20,21,30,31].”
Compact Modeling of MOSFET Wearout Mechanisms for Circuit-Reliability Simulation (2008, background): “The electrical effects of NBTI influence on pMOSFETs manifest in decreasing drain saturation current (Idsat) and transconductance (gm), increasing threshold voltage (Vt), and temporarily decreasing OFF-state current [62], [ 68 ].”
Review on SiC MOSFETs High-Voltage Device Reliability Focusing on Threshold Voltage Instability (2019, background): “fast to be responsible for slow traps, and elastic tunneling models [63], [64] have been discarded long ago for the NBTI-effect [65].”
Hot-Carrier acceleration factors for low power management in DC-AC stressed 40nm NMOS node at high temperature (2009, unknown): “This important topic has concentrated a lot of attentions these last years due to the strong consequences on both the device [24, 25] and product reliability as SRAM arrays [26].”
A Primer on Hardware Security: Models, Methods, and Metrics (2014, background): “3) Device Aging Models/Sensors: IC lifetime is influenced by a variety of phenomena [11], [42], [107], [108], such as negative temperature bias instability (NBTI), hot carrier injection, and electromagnetic migration.”
Stochastic charge trapping in oxides: From random telegraph noise to bias temperature instabilities (2012, background): “In that context it is interesting to remark that a considerable number of publications exist which show that during bias temperature stress defects with longer recovery time constants are activated [21,33,34].”