Ubiquitous relaxation in BTI stressing—New evaluation and insights
By Ben Kaczer, T. Grasser, Philippe Roussel, J. Martín-Martínez, Robert O'Connor, Barry O'Sullivan, Guido Groeseneken. IEEE International Reliability Physics Symposium, 2008
259 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/0ce76d805dd1675e319ca9bb06492d982c0607a8
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Electrical and Electronic Engineering
- Tibor Grasser
- Hans Reisinger
- Thomas Aichinger
- Ben Kaczer
- Michael Nelhiebel
- Philipp Hehenberger
- Wolfgang Goes
- Souvik Mahapatra
Citations in the corpus
- Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates (2016, methodology): “addition, PBTI reliability measurements based on the eMSM technique [6] at a fixed relaxation time of 1 ms do not show negative impact of the DWFM integration (Fig.”
- Origin of NBTI variability in deeply scaled pFETs (2010, methodology): “6 s range so far) [ 12 ]. In this description, “permanent” defects can be seen as those with τe ~ ∞. Significant progress in describing the voltage and temperature dependence of τc and τe using nonradiative multiphonon theory has been made [9].”
- The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction–Diffusion to Switching Oxide Traps (2011, background): “Only when researchers started to look at the detailed features of recovery, striking contradictions began to emerge [13], [18], [31], [32], which will be summarized here.”
- Stochastic charge trapping in oxides: From random telegraph noise to bias temperature instabilities (2012, methodology): “The dual problem is observed for conventional measure–stress– measure (MSM) setups [32,79].”