Vishal P. Trivedi

Electrical and Electronic Engineering · 2005

A researcher in the Science corpus: 2 papers; trusts 1 researcher and is trusted by 1 researcher here, as inferred from the citation graph.

Subfields

Whom Vishal P. Trivedi trusts overall

Their strongest outbound trust, strongest first, inferred from their citations.

  1. Jerry G. Fossum

Who trusts Vishal P. Trivedi overall

  1. Te-Kuang Chiang

Papers from Vishal P. Trivedi's perspective

Ordered by how strongly the researchers Vishal P. Trivedi trusts endorse each paper. Same corpus, a different order for every researcher.

  1. Double-gate CMOS: symmetrical- versus asymmetrical-gate devices
  2. Extension and source/drain design for high-performance FinFET devices
  3. FinFET scaling to 10 nm gate length (Digest. International Electron Devices Meeting,)
  4. A spacer patterning technology for nanoscale CMOS
  5. Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation (Digest. International Electron Devices Meeting,)
  6. Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs (IEEE International Electron Devices Meeting 2003)
  7. The Design of CMOS Radio-Frequency Integrated Circuits
  8. A logic nanotechnology featuring strained-silicon (IEEE Electron Device Letters)
  9. Nanoscale CMOS spacer FinFET for the terabit era
  10. FinFET-a self-aligned double-gate MOSFET scalable to 20 nm

Their papers