G. Ramanathan
Electrical and Electronic Engineering · 2011
A researcher in the Science corpus: 1 paper; trusts 1 researcher and is trusted by 0 researchers here, as inferred from the citation graph.
Subfields
- Electrical and Electronic Engineering — 9 citations into it
Whom G. Ramanathan trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Papers from G. Ramanathan's perspective
Ordered by how strongly the researchers G. Ramanathan trusts endorse each paper. Same corpus, a different order for every researcher.
- Double-Gate Tunnel FET With High-$\kappa$ Gate Dielectric (IEEE Transactions on Electron Devices)
- Demonstration of Tunneling FETs Based on Highly Scalable Vertical Silicon Nanowires (IEEE Electron Device Letters)
- Impact of SOI, Si1-xGexOI and GeOI substrates on CMOS compatible Tunnel FET performance (2008 IEEE International Electron Devices Meeting)
- Si tunnel transistors with a novel silicided source and 46mV/dec swing (Symposium on VLSI Technology)
- Steep Subthreshold Slope n- and p-Type Tunnel-FET Devices for Low-Power and Energy-Efficient Digital Circuits (IEEE Transactions on Electron Devices)
- Band-to-band tunneling in carbon nanotube field-effect transistors. (Physical Review Letters)
- International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －
- Low-subthreshold-swing tunnel transistors (IEEE Electron Device Letters)
- Length scaling of the Double Gate Tunnel FET with a high-K gate dielectric
- Complementary tunneling transistor for low power application