International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －
By 裕幸 飯田, 菊男 竹田, 武利 藤本. 2004
1,636 citations recorded by the source corpus.
Subfields: Atomic and Molecular Physics, and Optics
View Paper: https://www.semanticscholar.org/paper/12237ddac2abbbee8a8beb6d7a0f644142406ba9
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In Atomic and Molecular Physics, and Optics
Citations in the corpus
- Steep Subthreshold Slope n- and p-Type Tunnel-FET Devices for Low-Power and Energy-Efficient Digital Circuits (2009, methodology): “Compared with ITRS requirements, the proposed T-FETs exhibit lower S, IOFF, and Vth, and the high-k-based T-FETs show higher ON currents.”
- Limits on fundamental limits to computation (2014, methodology): “This is relatively new, as gate delays were dominant until 2000 [14], but wires get slower relative to gates at each new technology node.”
- Performance comparison between carbon nanotube and copper interconnects for gigascale integration (GSI) (2005, background): “Furthermore, wires, especially power and ground lines, are becoming more and more vulnerable to electromigration because of rapid increases in current densities [2].”
- Efficient Processing of Deep Neural Networks: A Tutorial and Survey (2017, methodology): “D DRAMs, as TSV have lower capacitance than typical off-chip interconnects.”
- High-Level Synthesis for FPGAs: From Prototyping to Deployment (2011, background): “According to ITRS prediction [111], the number of on-chip accelerators will custom architectures reach 3000 by 2024.”
- Enhancing lifetime and security of PCM-based Main Memory with Start-Gap Wear Leveling (2009, neutral): “Keywords: Phase Change Memory, Wear Leveling, Endurance.”
- Survey on High-Temperature Packaging Materials for SiC-Based Power Electronics Modules (2007, background): “So far, there have been no standards for high temperature electronics testing [43]-[44]; [44] proposed a set of parameters to adapt the military standard qualification (Mil-Prf-38534) to high temperature application electronics.”