Zeshan A. Chishti
Computer Networks and Communications · 2005
A researcher in the Science corpus: 1 paper; trusts 2 researchers and is trusted by 4 researchers here, as inferred from the citation graph.
Subfields
- Computer Networks and Communications — 5 citations into it; #5,689 of 9,886 by trust here, #7,140 by citations
- Hardware and Architecture — 5 citations into it; #796 of 1,551 by trust here, #1,153 by citations
Whom Zeshan A. Chishti trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts Zeshan A. Chishti overall
Papers from Zeshan A. Chishti's perspective
Ordered by how strongly the researchers Zeshan A. Chishti trusts endorse each paper. Same corpus, a different order for every researcher.
- Piranha: a scalable architecture based on single-chip multiprocessing (Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201))
- Managing Wire Delay in Large Chip-Multiprocessor Caches (Micro)
- Predicting inter-thread cache contention on a chip multi-processor architecture (International Symposium on High-Performance Computer Architecture)
- Simics: A Full System Simulation Platform (Computer)
- The future of wires (Proceedings of the IEEE)
- POWER4 system microarchitecture (IBM Journal of Research and Development)
- The microarchitecture of the Pentium 4 processor
- An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches (ASPLOS X)
- The M5 Simulator: Modeling Networked Systems (IEEE Micro)
- Specifying Systems: The TLA+ Language and Tools for Hardware and Software Engineers
Their papers
- Optimizing replication, communication, and capacity allocation in CMPs (2005) — 329 citations