The Tunnel Source (PNPN) n-MOSFET: A Novel High Performance Transistor

By V. Nagavarapu, Ritesh Jhaveri, Jason C. S. Woo. IEEE Transactions on Electron Devices, 2008

327 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/f70e453bdbb543c60c1551702eab7ebdd5f2add1

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In Electrical and Electronic Engineering

Citations in the corpus

Novel Attributes of a Dual Material Gate Nanoscale Tunnel Field-Effect Transistor (2011, background): “Tunnel Field Effect Transistors (TFETs) exhibit an excellent subthreshold swing and a very low leakage current and hence are being actively investigated for future low power CMOS applications [1-20].”
Effective Capacitance and Drive Current for Tunnel FET (TFET) CV/I Estimation (2009, background): “R ECENTLY, interband tunnel field-effect transistors (TFETs) have been extensively investigated [1]–[5] due”
Improvement in Reliability of Tunneling Field-Effect Transistor With p-n-i-n Structure (2011, background): “Higher on-current and lower SS, as compared with the p-i-n TFET have been demonstrated [2].”
Tunnel Field-Effect Transistor With an L-Shaped Gate (2016, background): “It has been demonstrated that a thin n+ pocket between the source and the channel can effectively improve the device performance [1], [8], [10], [12].”
Low-Voltage Tunnel Transistors for Beyond CMOS Logic (2010, unknown): “Use of high-K dielectrics has been observed to damp scattering and improves charge mobility in 2-D crystals such as graphene [48], [49] and MoS2 [46].”
Design of U-Shape Channel Tunnel FETs With SiGe Source Regions (2014, background): “The pnpn TFET structure has been proposed for improving the drive current and the SS of TFET [18]–[28].”
Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Heterodielectric BOX (2015, background): “an improved reliability compared with the p-i-n TFETs in addition to the increased ON-state current [10]–[12].”
Effect of Pocket Doping and Annealing Schemes on the Source-Pocket Tunnel Field-Effect Transistor (2011, methodology): “1 shows the device structure of the novel source-pocket n-type TFET (source-pocket n-TFET) on a bulk-Si substrate [7], [20].”
A Dielectric-Modulated Tunnel-FET-Based Biosensor for Label-Free Detection: Analytical Modeling Study and Sensitivity Analysis (2012, methodology): “Therefore, in the present work, the analytical framework developed for a p-n-p-n TFET [11] sensor in [6] is extended to incorporate the effect of the charge as well, and thus, the”
Interfacial Charge Analysis of Heterogeneous Gate Dielectric-Gate All Around-Tunnel FET for Improved Device Reliability (2016, unknown): “tunnel FET [7].”
Comparative Analysis of Dielectric-Modulated FET and TFET-Based Biosensor (2015, result): “Instead of conventional p-i-n structure, p-n-p-n type (also known as tunnel source MOSFET [8]) architecture is investigated to have ON current levels comparative to FET.”
Dielectric Modulated Tunnel Field-Effect Transistor—A Biomolecule Sensor (2012, methodology): “Thus, an abrupt and fully depleted heavily doped n+ pocket is the prerequisite for a p-n-p-n structure and the most challenging processing step too [5].”
In-Built N+ Pocket p-n-p-n Tunnel Field-Effect Transistor (2014, background): “To achieve a reduced operating voltage, high ON-state current and steep subthreshold slope (SS), recently the source-pocket (PNPN) tunnel field effect transistor (TFET) has been reported with promising electrical characteristics [7], [8].”