Improvement in Reliability of Tunneling Field-Effect Transistor With p-n-i-n Structure

By Wei Cao, C. Yao, G. Jiao, Daming Huang, H. Y. Yu, Ming-Fu Li. IEEE Transactions on Electron Devices, 2011

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A Dielectric-Modulated Tunnel-FET-Based Biosensor for Label-Free Detection: Analytical Modeling Study and Sensitivity Analysis (2012, background): “On the other hand, for the underlap case, because of the presence of the heavily doped n pocket region, there is negligible impact on the Ion/Ioff ratio [21].”
Tunnel Field-Effect Transistor With an L-Shaped Gate (2016, background): “It has been demonstrated that a thin n+ pocket between the source and the channel can effectively improve the device performance [1], [8], [10], [12].”
Performance Enhancement of Novel InAs/Si Hetero Double-Gate Tunnel FET Using Gaussian Doping (2016, background): “Furthermore, a p-n-i-n double-gate TFET (DG-TFET) with heavily doped fully depleted pocket in between the source and the channel has been studied from reliability perspective [8].”
In-Built N+ Pocket p-n-p-n Tunnel Field-Effect Transistor (2014, background): “obtaining a high ON-state current [6]–[12] and (iii) a reduction of the vertical electric field which minimizes the generation rate of the interface traps and thus improves reliability [12].”