In-Built N+ Pocket p-n-p-n Tunnel Field-Effect Transistor

By D. Abdi, Mamidala Jagadesh Kumar. IEEE Electron Device Letters, 2014

138 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/63c2178be7ecb012a5ed125d2d6ec31303e6eb81

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Shubham Sahay
2. Zhaonian Yang
3. Mamidala Jagadesh Kumar

Citations in the corpus

• Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Heterodielectric BOX (2015, background): “an improved reliability compared with the p-i-n TFETs in addition to the increased ON-state current [10]–[12].”
• Tunnel Field-Effect Transistor With an L-Shaped Gate (2016, background): “It has been demonstrated that a thin n+ pocket between the source and the channel can effectively improve the device performance [1], [8], [10], [12].”