Impact of NBTI on the temporal performance degradation of digital circuits
By Bipul Chandra Paul, Kun-hyuk Kang, Haldun Kufluoglu, M. A. Alam, Kaushik Roy. IEEE Electron Device Letters, 2005
310 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/dbbe8e6baa742f4493af71b04f2c5294febf6234
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In Electrical and Electronic Engineering
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Citations in the corpus
- Negative bias temperature instability: What do we understand? (2007, background): “2% performance degradation in ten years for 70 nm technology) to NBTI degradation than previously anticipated [50].”
- A comprehensive model for PMOS NBTI degradation: Recent progress (2007, unknown): “All rights reserved.”
- Predictive Modeling of the NBTI Effect for Reliable Design (2006, background): “While process variations can cause large parametric yield loss at the manufacturing stage, reliability concerns such as negative bias temperature instability (NBTI) [6], [8] and electron migration can considerably degrade the circuit performance during the course of its operation.”
- The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis (2010, background): “[1]–[ 5 ]. NBTI primarily affects pMOS devices and may result in up to 50 mV shifts in the threshold voltage through the life time, translating to more than 20% degradation in circuit”
- On the Physical Mechanism of NBTI in Silicon Oxynitride p-MOSFETs: Can Differences in Insulator Processing Conditions Resolve the Interface Trap Generation versus Hole Trapping Controversy? (2007, methodology): “Moreover, careful decomposition of the roles of ∆NIT and ∆Nh are necessary for accurate determination of NBTI-aware process and IC design [22].”
- Impact of NBTI on SRAM read stability and design for reliability (2006, methodology): “While the temporal degradation of static CMOS circuits can be offset by transistor up-sizing during design [8] (to account for the decrease in speed of the PMOS devices due to NBTI), memory circuits pose a much greater challenge.”