C. Rehnstedt
Electrical and Electronic Engineering · 2008
A researcher in the Science corpus: 1 paper; trusts 1 researcher and is trusted by 0 researchers here, as inferred from the citation graph.
Subfields
- Electrical and Electronic Engineering — 6 citations into it
- Biomedical Engineering — 5 citations into it
Whom C. Rehnstedt trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Papers from C. Rehnstedt's perspective
Ordered by how strongly the researchers C. Rehnstedt trusts endorse each paper. Same corpus, a different order for every researcher.
- High performance 5nm radius Twin Silicon Nanowire MOSFET (TSNWFET) : fabrication on bulk si wafer, characteristics, and reliability (IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest.)
- Benchmarking nanotechnology for high-performance and low-power logic transistor applications (IEEE transactions on nanotechnology)
- One-dimensional heterostructures in semiconductor nanowhiskers
- In search of "Forever," continued transistor scaling one new material at a time (IEEE transactions on semiconductor manufacturing)
- A logic nanotechnology featuring strained-silicon (IEEE Electron Device Letters)
- Effective electron mobility in Si inversion layers in metal–oxide–semiconductor systems with a high-κ insulator: The role of remote phonon scattering
- Ultrathin high-K gate stacks for advanced CMOS devices (International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224))
- Doping and Electrical Transport in Silicon Nanowires
- High performance fully-depleted tri-gate CMOS transistors (IEEE Electron Device Letters)
- A 90-nm logic technology featuring strained-silicon (IEEE Transactions on Electron Devices)
Their papers
- Vertical Enhancement-Mode InAs Nanowire Field-Effect Transistor With 50-nm Wrap Gate (2008) — 188 citations