Vertical Enhancement-Mode InAs Nanowire Field-Effect Transistor With 50-nm Wrap Gate

By Claes Thelander, L. Fröberg, C. Rehnstedt, Lars Samuelson, Lars-Erik Wernersson. IEEE Electron Device Letters, 2008

188 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/6f16da71160faec17217b0da89d1a037446ca53e

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Biomedical Engineering

1. J. Johansson
2. P. Caroff
3. Lars Samuelson
4. M. Björk
5. K. Deppert
6. Joerg Appenzeller
7. Joachim Knoch
8. Magnus Borgström

In Electrical and Electronic Engineering

1. Lars Samuelson
2. Heike E. Riel
3. Joerg Appenzeller
4. Joachim Knoch
5. J. Johansson
6. M. Björk
7. K. Deppert
8. P. Caroff

Citations in the corpus

• Toward Nanowire Electronics (2008, methodology): “NWs with diameters between 10 and 50 nm are frequently employed for device applications [10], [ 18 ].”
• Controlled polytypic and twin-plane superlattices in iii-v nanowires. (2009, background): “We have demonstrated this first for InAs nanowires, as this material has superior properties for both high-speed and low-power nanoelectronic”