Doping and Electrical Transport in Silicon Nanowires

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Benchmarking nanotechnology for high-performance and low-power logic transistor applications (2004, positive): “10 illustrate the mechanism of ambipolar conduction.”
Electronic properties of silicon nanowires (2005, background): “point of view, it has been shown that doped p type and n type SiNWS can be assembled to form p-n junctions, bipolar transistors, and complementary inverters [10], [25].”
Indium phosphide nanowires as building blocks for nanoscale electronic and optoelectronic devices (2001, background): “To confirm the presence and type of dopants in the nanowires, we have performed gate-dependent, two-terminal transport measurements on individual wires, as the conductance will respond in an opposite way to changes in gate voltage ( V g ) for n-and p-type nanowires: V g > 0 will lead to an”
Doping of semiconductor nanowires (2011, methodology): “In the linear transistor regime, the transconductance is connected to the mobility [20]: 𝑔𝑚 = 𝑑𝐼𝑆𝐷 𝑑𝑉𝐺 � 𝑉𝑆𝐷=𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡 = 𝐶𝜇 𝐿2 𝑉𝑆𝐷 (6.2) Here, ISD is the source-drain current of the NW-FET, VSD and VG are the sourcedrain and gate voltages, respectively, and L is the length o”