Michael A. Kozuch
Computer Networks and Communications · 2002–2017
A researcher in the Science corpus: 8 papers; trusts 20 researchers and is trusted by 12 researchers here, as inferred from the citation graph.
Subfields
- Computer Networks and Communications — 71 citations into it; #3,191 of 9,886 by trust here, #828 by citations
- Hardware and Architecture — 56 citations into it; #1,076 of 1,551 by trust here, #341 by citations
- Information Systems — 34 citations into it; #5,675 of 8,771 by trust here, #3,198 by citations
Whom Michael A. Kozuch trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
- Athicha Muthitacharoen
- Mahadev Satyanarayanan
- Moinuddin K. Qureshi
- Benjie Chen
- Yoongu Kim
- Aamer Jaleel
- Peter M. Chen
- Stijn Eyerman
- David Mazières
- Yuejian Xie
Who trusts Michael A. Kozuch overall
- Mahadev Satyanarayanan
- Tal Garfinkel
- Paramvir Victor Bahl
- Mendel Rosenblum
- Chang Liu
- Keir Fraser
- Ramón Cáceres
Papers from Michael A. Kozuch's perspective
Ordered by how strongly the researchers Michael A. Kozuch trusts endorse each paper. Same corpus, a different order for every researcher.
- Symbiotic jobscheduling for a simultaneous mutlithreading processor (SIGP)
- Balancing thoughput and fairness in SMT processors (2001 IEEE International Symposium on Performance Analysis of Systems and Software. ISPASS.)
- Adaptive insertion policies for high performance caching (International Symposium on Computer Architecture)
- A Case for MLP-Aware Cache Replacement (International Symposium on Computer Architecture)
- Adaptive insertion policies for managing shared caches (International Conference on Parallel Architectures and Compilation Techniques)
- Fair cache sharing and partitioning in a chip multiprocessor architecture (Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 2004. PACT 2004.)
- Space/time trade-offs in hash coding with allowable errors
- Architecting phase change memory as a scalable dram alternative (International Symposium on Computer Architecture)
- The gem5 simulator (CARN)
- LIRS: an efficient low inter-reference recency set replacement policy to improve buffer cache performance (Measurement and Modeling of Computer Systems)
Their papers
- c-Through: part-time optics in data centers (2010) — 808 citations
- The evicted-address filter: A unified mechanism to address both cache pollution and thrashing (2012) — 407 citations
- Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology (2017) — 638 citations
- RowClone: Fast and energy-efficient in-DRAM bulk data copy and initialization (2013) — 491 citations
- Base-delta-immediate compression: Practical data compression for on-chip caches (2012) — 402 citations
- Heterogeneity and dynamicity of clouds at scale: Google trace analysis (2012) — 1,197 citations
- AutoScale: Dynamic, Robust Capacity Management for Multi-Tier Data Centers (2012) — 335 citations
- Internet suspend/resume (2002) — 335 citations