Flattened Butterfly Topology for On-Chip Networks
By John Kim, James D. Balfour, William (Bill) J. Dally. Micro, 2007
475 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/e47adc1fc8950ffa95a5be9603b1febe798ffb77
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Onur Mutlu
- Thomas Moscibroda
- Torsten Hoefler
- Maciej Besta
- James D. Balfour
- John Kim
- William (Bill) J. Dally
- Li-Shiuan Peh
In Hardware and Architecture
- Onur Mutlu
- Thomas Moscibroda
- Torsten Hoefler
- Maciej Besta
- Tushar Krishna
- Niraj Kumar Jha
- Li-Shiuan Peh
- Niket Agarwal
Citations in the corpus
- Slim Fly: A Cost Effective Low-Diameter Network Topology (2014, methodology): “For lower radix topologies (T3D, T5D, HC, LH-HC) we select p = 1 following strategies from [1], [26], [27].”
- Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges (2012, background): “There have been some efforts to address this problem by introducing ultra-low-latency and low power express channels between highly separated nodes [2] and high radix networks [3].”
- A detailed and flexible cycle-accurate Network-on-Chip simulator (2013, methodology): “BookSim has been used to study many different aspects of network design, including topology [2], [3], routing [4], flow control [5], [6], router microarchitecture [7], quality-of-service [8], as well as new technologies such as nanophotonics [9], [10].”
- Firefly: illuminating future network-on-chip with nanophotonics (2009, background): “Recent work has shown that the use of concentration and high-radix topology is more efficient for on-chip networks [3, 20].”
- A case for bufferless routing in on-chip networks (2009, background): “Regarding the third, many on-chip interconnection networks are observed to be operating at relatively low packet injection rates [16], [15], which are significant ly below their peak throughput.”
- GARNET: A detailed on-chip network model inside a full-system simulator (2009, background): “The configuration file can be used to specify complex network configurations like fat tree [10], flattened butterfly [17], etc.”