Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation

By Brett Stanley Feero, Partha Pratim Pande. IEEE transactions on computers, 2009

512 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Electrical and Electronic Engineering, Materials Chemistry

View Paper: https://www.semanticscholar.org/paper/8b1a3c867a9f976feba868d7fb9229534b05bc0e

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Computer Networks and Communications

1. Partha Pratim Pande
2. Benjamin J. Belzer
3. Sujay Deb
4. Amlan Ganguly

In Electrical and Electronic Engineering

1. Partha Pratim Pande
2. Benjamin J. Belzer
3. Sujay Deb
4. Amlan Ganguly

In Materials Chemistry

1. Partha Pratim Pande
2. Benjamin J. Belzer
3. Sujay Deb
4. Amlan Ganguly

Citations in the corpus

• Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges (2012, unknown): “D mesh-based NoC with four layers as in [26].”
• Scalable Hybrid Wireless Network-on-Chip Architectures for Multicore Systems (2011, background): “The amalgamation of two emerging paradigms, namely NoCs and 3D ICs, allows for the creation of new structures that enable significant performance enhancements over traditional solutions [6], [14] [15].”