Yervant Zorian

International Test Conference · 2009

A researcher in the Science corpus: 1 paper; trusts 0 researchers and is trusted by 0 researchers here, as inferred from the citation graph.

Papers from Yervant Zorian's perspective

Ordered by how strongly the researchers Yervant Zorian trusts endorse each paper. Same corpus, a different order for every researcher.

  1. 3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias (International Electron Devices Meeting)
  2. Processor Design in 3D Die-Stacking Technologies (IEEE Micro)
  3. 8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology (IEEE Journal of Solid-State Circuits)
  4. Three-Dimensional Integrated Circuits and the Future of System-on-Chip Designs (Proceedings of the IEEE)
  5. Embedded deterministic test (IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems)
  6. 3D silicon integration (Electronic Components and Technology Conference)
  7. Electrical integrity of state-of-the-art 0.13 /spl mu/m SOI CMOS devices and circuits transferred for three-dimensional (3D) integrated circuit (IC) fabrication (Digest. International Electron Devices Meeting,)
  8. Embedded deterministic test for low cost manufacturing test (Proceedings. International Test Conference)
  9. OPMISR: the foundation for compressed ATPG vectors (Proceedings International Test Conference 2001 (Cat. No.01CH37260))
  10. The microarchitecture of the Pentium 4 processor

Their papers