Dynamic NBTI of p-MOS transistors and its impact on MOSFET scaling
By Chen Gang, Ming-Fu Li, C. Ang, Jiachun Zheng, Dim-Lee Kwong. IEEE Electron Device Letters, 2002
160 citations recorded by the source corpus.
Subfields: Atomic and Molecular Physics, and Optics, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/f5b3f128573f8bd3f1a07324f48d505ab6345fe4
How researchers see this paper
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In Atomic and Molecular Physics, and Optics
- M. A. Alam
- Chris Hyung-Il Kim
- Sachin S. Sapatnekar
- Bipul Chandra Paul
- Haldun Kufluoglu
- Kun-hyuk Kang
- Sanjay V. Kumar
- Souvik Mahapatra
In Electrical and Electronic Engineering
- Haldun Kufluoglu
- Dhanoop Varghese
- Souvik Mahapatra
- Chris Hyung-Il Kim
- Sachin S. Sapatnekar
- Sanjay V. Kumar
- M. A. Alam
- A. E. Islam
Citations in the corpus
- Recent Issues in Negative-Bias Temperature Instability: Initial Degradation, Field Dependence of Interface Trap Generation, Hole Trapping Effects, and Relaxation (2007, result): “which has been observed in some [26], [27] but not all [28] experiments.”
- A comprehensive model for PMOS NBTI degradation: Recent progress (2007, background): “(5) A number of groups reported that NBTI is smaller for AC stress compared to DC stress, and the ratio of AC to DC NBTI degradation is frequency independent [6,9,18] at least for low frequencies (<10– 100 kHz).”
- Impact of NBTI on SRAM read stability and design for reliability (2006, methodology): “The effects of NBTI on digital CMOS circuits have been analyzed by authors in [2], [4], [5], [7]–[9].”
- Compact Modeling of MOSFET Wearout Mechanisms for Circuit-Reliability Simulation (2008, background): “Traditional NBTI analysis neglects these important new effects obviously observed from latest experimental work which lead to relaxed NBTI degradation [74], [ 84 ].”
- Impact of NBTI on the temporal performance degradation of digital circuits (2005, background): “Due to an increasing electric field across the thin oxide, the generation of interface traps under negative bias temperature instability (NBTI) in pMOS transistors has become one of the most critical reliability issues that determine the lifetime of CMOS devices [1], [2].”
- A Comparative Study of Different Physics-Based NBTI Models (2013, background): “see [28] for details), the ac-to-dc ratio at 50% PDC shows a wide spread across different sources [9], [28], [29], [55], [70].”