Performance Comparison Between p-i-n Tunneling Transistors and Conventional MOSFETs

By Siyu Koswatta, Mark S. Lundstrom, Dmitri E. Nikonov. IEEE Transactions on Electron Devices, 2008

420 citations recorded by the source corpus.

In this paper, we present a detailed performance comparison between conventional n-i-n MOSFET transistors and tunneling field-effect transistors (TFETs) based on the p-i-n geometry, using semiconducting carbon nanotubes as the model channel material. Quantum-transport simulations are performed using the nonequilibrium Green's function formalism considering realistic phonon-scattering and band-to-band tunneling mechanisms. Simulations show that TFETs have a smaller quantum capacitance at most gate biases. Despite lower on-current, they can switch faster in a range of on/off-current ratios. Switching energy for TFETs is observed to be fundamentally smaller than that for MOSFETs, leading to lower dynamic power dissipation. Furthermore, the beneficial features of TFETs are retained with different bandgap materials. These reasons suggest that the p-i-n TFET is well suited for low-power applications.

Subfields: Electrical and Electronic Engineering, Materials Chemistry

View Paper: https://www.semanticscholar.org/paper/416d207ea856779865bbdd9b27496b6268ded6b9

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

In Materials Chemistry

Citations in the corpus

Tunneling Field-Effect Transistor: Capacitance Components and Modeling (2010, methodology): “in TFETs employing carbon nanotube or graphene [17], [18].”
On the Possibility of Obtaining MOSFET-Like Performance and Sub-60-mV/dec Swing in 1-D Broken-Gap Tunnel Transistors (2010, background): “It is also seen that all TFETs can have a large drain-originating channel capacitance (Cch−D) at higher gate biases [18], [36].”
Low-Voltage Tunnel Transistors for Beyond CMOS Logic (2010, neutral): “Initial demonstrations of in-plane 2-D crystal heterostructures such as graphene seamlessly connected to BN have been experimentally observed, and provide exciting opportunities in device design [51].”
Comparative Analyses of Circular Gate TFET and Heterojunction TFET for Dielectric-Modulated Label-Free Biosensing (2019, neutral): “currents and better subthreshold swings [1]–[4].”
Overview of Beyond-CMOS Devices and a Uniform Methodology for Their Benchmarking (2013, background): “Simulations show that charge on a gate of the TFET is smaller than the corresponding CMOS [15].”
Effective Capacitance and Drive Current for Tunnel FET (TFET) CV/I Estimation (2009, methodology): “has been shown in [8] that the intrinsic speed of TFETs can be higher than MOSFETs over a certain range of ION/IOFF ratios because of the smaller charge involved in the entire switching”
Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Heterodielectric BOX (2015, background): “THE tunnel FET (TFET) has been proposed as a replacement of the standard CMOS for low-power applications [1]–[4].”
Novel Attributes of a Dual Material Gate Nanoscale Tunnel Field-Effect Transistor (2011, background): “DUCTION Tunnel Field Effect Transistors (TFETs) exhibit an excellent subthreshold swing and a very low leakage current and hence are being actively investigated for future low power CMOS applications [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20]. However, TFETs suffer from ”