Tunnel field-effect transistor without gate-drain overlap

By A. Verhulst, William G. Vandenberghe, K. Maex, G. Groeseneken. 2007

423 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/00fb2f6599c5131769617d1c40be0fa56f3a4aac

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In Biomedical Engineering

In Electrical and Electronic Engineering

Citations in the corpus

Performance Comparison Between p-i-n Tunneling Transistors and Conventional MOSFETs (2008, background): “tunneling-barrier properties of a TFET have a more dominant effect on the drive current, and the channel mobility itself has only a comparatively minor influence [13], [15], [24], [37].”
Optimization of Gate-on-Source-Only Tunnel FETs With Counter-Doped Pockets (2012, background): “, heterostructure TFETs [3]–[10], encroaching source TFETs [11]–[14], a TFET with a short gate electrode [15], and TFETs with a large gate–source overlap [8]–[10],”
Effect of Drain Doping Profile on Double-Gate Tunnel Field-Effect Transistor and its Influence on Device RF Performance (2014, background): “The channel resistance has a negligible influence on ION since the series resistance is mostly dominated by the tunneling barrier between source and channel region [28].”
Hetero-Gate-Dielectric Tunneling Field-Effect Transistors (2010, background): “havior, TFETs without gate–drain overlap have been proposed [9].”
Interfacial Charge Analysis of Heterogeneous Gate Dielectric-Gate All Around-Tunnel FET for Improved Device Reliability (2016, methodology): “Abundant techniques have been explored for resolving this issue such as using a smaller band gap material in the source region such as germanium [1], hetero gate dielectric TFET [2], double gate architecture [3], gate to source overlap [4], gate to drain underlap [5], dual material gate [6], n-pocke”
Controlling the Drain Side Tunneling Width to Reduce Ambipolar Current in Tunnel FETs Using Heterodielectric BOX (2015, background): “gate–drain underlap, low drain doping, lateral heterostructure with high bandgap material at drain side, and the low-k spacers have been proposed [13]–[17].”
Tunnel Field-Effect Transistors: Prospects and Challenges (2015, background): “One concern about fitting a TFET transistor into the same gate-pitch as a MOSFET is TFET’s drain underlap requirement [11].”
A Dielectric-Modulated Tunnel-FET-Based Biosensor for Label-Free Detection: Analytical Modeling Study and Sensitivity Analysis (2012, background): “Moreover, only a source-side nanogap cavity is considered as the impact of gate–drain underlap is insignificant on the electrical characteristics of the TFET [8].”
Complementary Silicon-Based Heterostructure Tunnel-FETs With High Tunnel Rates (2008, background): “The channel resistance, being smaller for electrons than for holes [18], only affects the TFET current once it is larger than the resistance associated with the tunnel barrier [3].”
Novel Attributes of a Dual Material Gate Nanoscale Tunnel Field-Effect Transistor (2011, background): “the source and drain doping profiles as abrupt throughout our simulations as in earlier works [4], [5], [10], [12], [15].”
A Compact 2-D Analytical Model for Electrical Characteristics of Double-Gate Tunnel Field-Effect Transistors With a SiO2/High- $k$ Stacked Gate-Oxide Structure (2016, background): “[10] simulated a vertical nanowire-based double-gate (DG) TFET structure to demonstrate the increase in the ON-current (by the reduction of ambipolar behavior), increase in switching speed, and decrease in processing complexity of the device.”
Comparative Performance Analysis of the Dielectrically Modulated Full- Gate and Short-Gate Tunnel FET-Based Biosensors (2015, background): “characteristics and thereby improving the subthreshold swing of TFET [24]–[28].”