Roberto Suaya

Electrical and Electronic Engineering · 2007–2010

A researcher in the Science corpus: 2 papers; trusts 3 researchers and is trusted by 0 researchers here, as inferred from the citation graph.

Subfields

Whom Roberto Suaya trusts overall

Their strongest outbound trust, strongest first, inferred from their citations.

  1. Timothy A. Davis
  2. Hong Li

Papers from Roberto Suaya's perspective

Ordered by how strongly the researchers Roberto Suaya trusts endorse each paper. Same corpus, a different order for every researcher.

  1. 3D stacked IC demonstration using a through Silicon Via First approach (2008 IEEE International Electron Devices Meeting)
  2. Compact physical models for multiwall carbon-nanotube interconnects (IEEE Electron Device Letters)
  3. Circuit Modeling and Performance Analysis of Multi-Walled Carbon Nanotube Interconnects (IEEE Transactions on Electron Devices)
  4. High-Frequency Analysis of Carbon Nanotube Interconnects and Implications for On-Chip Inductor Design (IEEE Transactions on Electron Devices)
  5. On the Applicability of Single-Walled Carbon Nanotubes as VLSI Interconnects (IEEE transactions on nanotechnology)
  6. Development and Evaluation of 3-D SiP with Vertically Interconnected Through Silicon Vias (TSV) (2007 Proceedings 57th Electronic Components and Technology Conference)
  7. Closed-Form Expressions of 3-D Via Resistance, Inductance, and Capacitance (IEEE Transactions on Electron Devices)
  8. Power Delivery for 3D Chip Stacks: Physical Modeling and Design Implication (2007 IEEE Electrical Performance of Electronic Packaging)
  9. Electrical Modeling and Characterization of Through Silicon via for Three-Dimensional ICs (IEEE Transactions on Electron Devices)
  10. A column pre-ordering strategy for the unsymmetric-pattern multifrontal method (TOMS)

Their papers