Development and Evaluation of 3-D SiP with Vertically Interconnected Through Silicon Vias (TSV)

By D. Jang, Chunghyun Ryu, Kwangyong Lee, B. Cho, Joungho Kim, Taesung Oh, W. Lee, Jin Yu. 2007 Proceedings 57th Electronic Components and Technology Conference, 2007

164 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/370fbcf75c808747afe68372d009ff79d273505d

How researchers see this paper

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In Electrical and Electronic Engineering

1. Hong Li
2. Chuan Xu
3. Kaustav Banerjee
4. Roberto Suaya
5. Navin Srivastava

Citations in the corpus

• Compact AC Modeling and Performance Analysis of Through-Silicon Vias in 3-D ICs (2010, background): “4An equivalent circuit is provided in [26] to extract the circuit components from measurement results.”