Jian Li
Computer Networks and Communications · with Xie · 2009
A researcher in the Science corpus: 2 papers; trusts 1 researcher and is trusted by 0 researchers here, as inferred from the citation graph.
Subfields
- Computer Networks and Communications — 17 citations into it
- Hardware and Architecture — 15 citations into it
- Electrical and Electronic Engineering — 14 citations into it
Whom Jian Li trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Papers from Jian Li's perspective
Ordered by how strongly the researchers Jian Li trusts endorse each paper. Same corpus, a different order for every researcher.
- Optimizing replication, communication, and capacity allocation in CMPs (International Symposium on Computer Architecture)
- Die Stacking (3D) Microarchitecture (Micro)
- An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches (ASPLOS X)
- Niagara: a 32-way multithreaded Sparc processor (IEEE Micro)
- Simics: A Full System Simulation Platform (Computer)
- Managing Wire Delay in Large Chip-Multiprocessor Caches (Micro)
- The PARSEC benchmark suite: Characterization and architectural implications (International Conference on Parallel Architectures and Compilation Techniques)
- Design and Management of 3D Chip Multiprocessors Using Network-in-Memory (International Symposium on Computer Architecture)
- Demystifying 3D ICs: the pros and cons of going vertical (IEEE Design & Test of Computers)
- Introduction to the Cell multiprocessor
Their papers
- A novel architecture of the 3D stacked MRAM L2 cache for CMPs (2009) — 455 citations
- Hybrid cache architecture with disparate memory technologies (2009) — 380 citations