Anup Dandapat

IEEE Transactions on Very Large Scale Integration (vlsi) Systems · 2015

A researcher in the Science corpus: 1 paper; trusts 0 researchers and is trusted by 0 researchers here, as inferred from the citation graph.

Papers from Anup Dandapat's perspective

Ordered by how strongly the researchers Anup Dandapat trusts endorse each paper. Same corpus, a different order for every researcher.

  1. Performance analysis of low-power 1-bit CMOS full adder cells (IEEE Transactions on Very Large Scale Integration (vlsi) Systems)
  2. Low-voltage low-power CMOS full adder
  3. Design and analysis of low-power 10-transistor full adders using novel XOR-XNOR gates
  4. A review of 0.18-μm full adder performances for tree structured arithmetic circuits (IEEE Transactions on Very Large Scale Integration (vlsi) Systems)
  5. Digital Integrated Circuits A Design Perspective
  6. CMOS VLSI Design: A Circuits and Systems Perspective
  7. CMOS Full-Adders for Energy-Efficient Arithmetic Applications (IEEE Transactions on Very Large Scale Integration (vlsi) Systems)
  8. Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style (IEEE Transactions on Very Large Scale Integration (vlsi) Systems)
  9. The emotional characteristics of teaching: an ethnographic study of one teacher
  10. A Study Of Mathematics Anxiety in Pre-Service Teachers

Their papers