Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder Circuit

By Partha Bhattacharyya, Bijoy Kundu, Sovan Ghosh, Vinay Kumar, Anup Dandapat. IEEE Transactions on Very Large Scale Integration (vlsi) Systems, 2015

318 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/20cf575db5314d2c312b269564c12838e2eb9080