Todd C. Mowry
Hardware and Architecture · 2000–2017
A researcher in the Science corpus: 5 papers; trusts 12 researchers and is trusted by 2 researchers here, as inferred from the citation graph.
Subfields
- Hardware and Architecture — 44 citations into it; #1,075 of 1,551 by trust here, #301 by citations
- Computer Networks and Communications — 41 citations into it; #7,422 of 9,886 by trust here, #2,099 by citations
- Information Systems — 11 citations into it
Whom Todd C. Mowry trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts Todd C. Mowry overall
Papers from Todd C. Mowry's perspective
Ordered by how strongly the researchers Todd C. Mowry trusts endorse each paper. Same corpus, a different order for every researcher.
- Symbiotic jobscheduling for a simultaneous mutlithreading processor (SIGP)
- Balancing thoughput and fairness in SMT processors (2001 IEEE International Symposium on Performance Analysis of Systems and Software. ISPASS.)
- Adaptive insertion policies for high performance caching (International Symposium on Computer Architecture)
- A Case for MLP-Aware Cache Replacement (International Symposium on Computer Architecture)
- Adaptive insertion policies for managing shared caches (International Conference on Parallel Architectures and Compilation Techniques)
- Fair cache sharing and partitioning in a chip multiprocessor architecture (Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 2004. PACT 2004.)
- Space/time trade-offs in hash coding with allowable errors
- The gem5 simulator (CARN)
- LIRS: an efficient low inter-reference recency set replacement policy to improve buffer cache performance (Measurement and Modeling of Computer Systems)
- PIPP: promotion/insertion pseudo-partitioning of multi-core shared caches (International Symposium on Computer Architecture)
Their papers
- The evicted-address filter: A unified mechanism to address both cache pollution and thrashing (2012) — 407 citations
- Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology (2017) — 638 citations
- RowClone: Fast and energy-efficient in-DRAM bulk data copy and initialization (2013) — 491 citations
- Base-delta-immediate compression: Practical data compression for on-chip caches (2012) — 402 citations
- A scalable approach to thread-level speculation (2000) — 411 citations